User Contributed MET/CAL PROCEDURE ============================================================================= INSTRUMENT: Sub PM 6304 (Performance) Part#2 RS232 DATE: 01-Jun-95 AUTHOR: User Contributed REVISION: 1.0 ADJUSTMENT THRESHOLD: 95% NUMBER OF TESTS: 31 NUMBER OF LINES: 230 ============================================================================= STEP FSC RANGE NOMINAL TOLERANCE MOD1 MOD2 3 4 CON 1.001 ASK+ D 1.002 ASK- R N P J F W 1.003 PORT [P9600,N,8,1,H] 1.004 PORT [27]2 1.005 HEAD {4.4.5 AC Measurements - 10 Khz Test Frequency} 1.006 DISP Remove all connections. Connect Open Circuit test post 1.006 DISP adapter to the two left positions. 1.007 PORT *RST;[D999]FRE 10E3;TRIM;*OPC?[10][I] 1.008 DISP Connect Short Circuit test post adapter to the two left 1.008 DISP positions. 1.009 PORT TRIM;*OPC?[10][I] 1.010 PORT CON[10] 1.011 DISP Connect 4 ohm Standard Resistor to the two left 1.011 DISP positions. 1.012 MATH MEM1=M[2] 1.013 PORT [CLR]LEV LO;CON[10][D2000] 1.013 PORT RESI?[10][I][D1001];RESI?[10][I] 1.014 MEME 1.015 MEMC 1 ohm 0.6% 0.0000U LowLevel 2.001 MATH MEM1=M[2] 2.002 PORT LEV NO[10][D1000] 2.003 PORT RESI?[10][I][D1001];RESI?[10][I] 2.004 MEME 2.005 MEMC 1 ohm 0.11% 0.0000U NormalLevel 3.001 MATH MEM1=M[2] 3.002 PORT LEV HI[10][D1000] 3.003 PORT RESI?[10][I][D1001];RESI?[10][I] 3.004 MEME 3.005 MEMC 1 ohm 0.11% 0.0000U HighLevel 4.001 DISP Connect 500 Kohm Standard Resistor to the two left 4.001 DISP positions. 4.002 MATH MEM1=M[5] 4.003 PORT LEV LO[10][D1000] 4.004 PORT RESI?[10][I][D1001];RESI?[10][I] 4.005 MEM/ 1000 4.006 MEME 4.007 MEMC 100 Kohm 0.55% 0.00U LowLevel 5.001 MATH MEM1=M[5] 5.002 PORT LEV NO[10][D1000] 5.003 PORT RESI?[10][I][D1001];RESI?[10][I] 5.004 MEM/ 1000 5.005 MEME 5.006 MEMC 100 Kohm 0.12% 0.00U NormalLevel 6.001 MATH MEM1=M[5] 6.002 PORT LEV HI[10][D1000] 6.003 PORT RESI?[10][I][D1001];RESI?[10][I] 6.004 MEM/ 1000 6.005 MEME 6.006 MEMC 100 Kohm 0.12% 0.00U HighLevel 7.001 DISP Connect 10 nF Standard Capacitor to the two left 7.001 DISP positions. 7.002 MATH MEM1=M[8] 7.003 PORT LEV LO[10][D1000] 7.004 PORT CAP?[10][I][D1001];CAP?[10][I] 7.005 MEM* 1000000000 7.006 MEME 7.007 MEMC 10 nF 0.7% 0.000U LowLevel 8.001 MATH MEM1=M[8] 8.002 PORT LEV NO[10][D1000] 8.003 PORT CAP?[10][I][D1001];CAP?[10][I] 8.004 MEM* 1000000000 8.005 MEME 8.006 MEMC 10 nF 0.3% 0.000U NormalLevel 9.001 MATH MEM1=M[8] 9.002 PORT LEV HI[10][D1000] 9.003 PORT CAP?[10][I][D1001];CAP?[10][I] 9.004 MEM* 1000000000 9.005 MEME 9.006 MEMC 10 nF 0.3% 0.000U HighLevel 10.001 HEAD {4.4.5 AC Measurements - 100 Khz Test Frequency} 10.002 DISP Remove all connections. Connect Open Circuit test post 10.002 DISP adapter to the two left positions. 10.003 PORT *RST;[D999]FRE 100E3;TRIM;*OPC?[10][I] 10.004 DISP Connect Short Circuit test post adapter to the two left 10.004 DISP positions. 10.005 PORT TRIM;*OPC?[10][I] 10.006 PORT CON[10] 10.007 DISP Connect 4 ohm Standard Resistor to the two left 10.007 DISP positions. 10.008 MATH MEM1=M[2] 10.009 PORT LEV LO[10][D2000] 10.010 PORT RESI?[10][I][D1001];RESI?[10][I] 10.011 MEME 10.012 MEMC 1 ohm 2% 0.0000U LowLevel 11.001 MATH MEM1=M[2] 11.002 PORT LEV NO[10][D1000] 11.003 PORT RESI?[10][I][D1001];RESI?[10][I] 11.004 MEME 11.005 MEMC 1 ohm 0.5% 0.0000U NormalLevel 12.001 MATH MEM1=M[2] 12.002 PORT LEV HI[10][D1000] 12.003 PORT RESI?[10][I][D1001];RESI?[10][I] 12.004 MEME 12.005 MEMC 1 ohm 0.5% 0.0000U HighLevel 13.001 DISP Connect 500 Kohm Standard Resistor to the two left 13.001 DISP positions. 13.002 MATH MEM1=M[5] 13.003 PORT LEV LO[10][D1000] 13.004 PORT RESI?[10][I][D1001];RESI?[10][I] 13.005 MEM/ 1000 13.006 MEME 13.007 MEMC 100 Kohm 2% 0.00U LowLevel 14.001 MATH MEM1=M[5] 14.002 PORT LEV NO[10][D1000] 14.003 PORT RESI?[10][I][D1001];RESI?[10][I] 14.004 MEM/ 1000 14.005 MEME 14.006 MEMC 100 Kohm 0.5% 0.00U NormalLevel 15.001 MATH MEM1=M[5] 15.002 PORT LEV HI[10][D1000] 15.003 PORT RESI?[10][I][D1001];RESI?[10][I] 15.004 MEM/ 1000 15.005 MEME 15.006 MEMC 100 Kohm 0.5% 0.00U HighLevel 16.001 MATH MEM1=M[20] 16.002 JMPF 31.001 16.003 HEAD {4.4.6 DC Measurements} 16.004 DISP Remove all connections. Connect Open Circuit test post 16.004 DISP adapter to the two left positions. 16.005 PORT *RST;[D999]TEST_SIG DC;TRIM;*OPC?[10][I] 16.006 DISP Connect Short Circuit test post adapter to the two left 16.006 DISP positions. 16.007 PORT TRIM;*OPC?[10][I] 16.008 PORT CON[10] 16.009 DISP Connect 1 ohm Standard Resistor to the two left 16.009 DISP positions. 16.010 MATH MEM1=M[1] 16.011 PORT LEV LO[10][D1000] 16.012 PORT RESI?[10][I][D1001];RESI?[10][I] 16.013 MEME 16.014 MEMC 1 ohm 1.4% 0.0000U LowLevel 17.001 MATH MEM1=M[1] 17.002 PORT LEV NO[10][D1000] 17.003 PORT RESI?[10][I][D1001];RESI?[10][I] 17.004 MEME 17.005 MEMC 1 ohm 0.5% 0.0000U NormalLevel 18.001 MATH MEM1=M[1] 18.002 PORT LEV HI[10][D1000] 18.003 PORT RESI?[10][I][D1001];RESI?[10][I] 18.004 MEME 18.005 MEMC 1 ohm 0.9% 0.0000U HighLevel 19.001 DISP Connect 4 ohm Standard Resistor to the two left 19.001 DISP positions. 19.002 MATH MEM1=M[2] 19.003 PORT LEV LO[10][D1000] 19.004 PORT RESI?[10][I][D1001];RESI?[10][I] 19.005 MEME 19.006 MEMC 1 ohm 0.5% 0.0000U LowLevel 20.001 MATH MEM1=M[2] 20.002 PORT LEV NO[10][D1000] 20.003 PORT RESI?[10][I][D1001];RESI?[10][I] 20.004 MEME 20.005 MEMC 1 ohm 0.11% 0.0000U NormalLevel 21.001 MATH MEM1=M[2] 21.002 PORT LEV HI[10][D1000] 21.003 PORT RESI?[10][I][D1001];RESI?[10][I] 21.004 MEME 21.005 MEMC 1 ohm 2% 0.0000U HighLevel 22.001 DISP Connect 10 Kohm Standard Resistor to the two left 22.001 DISP positions. 22.002 MATH MEM1=M[4] 22.003 PORT LEV LO[10][D1000] 22.004 PORT RESI?[10][I][D1001];RESI?[10][I] 22.005 MEM/ 1000 22.006 MEME 22.007 MEMC 10 Kohm 0.11% 0.000U LowLevel 23.001 MATH MEM1=M[4] 23.002 PORT LEV NO[10][D1000] 23.003 PORT RESI?[10][I][D1001];RESI?[10][I] 23.004 MEM/ 1000 23.005 MEME 23.006 MEMC 10 Kohm 0.11% 0.000U NormalLevel 24.001 MATH MEM1=M[4] 24.002 PORT LEV HI[10][D1000] 24.003 PORT RESI?[10][I][D1001];RESI?[10][I] 24.004 MEM/ 1000 24.005 MEME 24.006 MEMC 10 Kohm 0.11% 0.000U HighLevel 25.001 DISP Connect 500 Kohm Standard Resistor to the two left 25.001 DISP positions. 25.002 MATH MEM1=M[5] 25.003 PORT LEV LO[10][D1000] 25.004 PORT RESI?[10][I][D1001];RESI?[10][I] 25.005 MEM/ 1000 25.006 MEME 25.007 MEMC 100 Kohm 0.5% 0.00U LowLevel 26.001 MATH MEM1=M[5] 26.002 PORT LEV NO[10][D1000] 26.003 PORT RESI?[10][I][D1001];RESI?[10][I] 26.004 MEM/ 1000 26.005 MEME 26.006 MEMC 100 Kohm 0.12% 0.00U NormalLevel 27.001 MATH MEM1=M[5] 27.002 PORT LEV HI[10][D1000] 27.003 PORT RESI?[10][I][D1001];RESI?[10][I] 27.004 MEM/ 1000 27.005 MEME 27.006 MEMC 100 Kohm 0.12% 0.00U HighLevel 28.001 DISP Connect 2 Mohm Standard Resistor to the two left 28.001 DISP positions. 28.002 MATH MEM1=M[6] 28.003 PORT LEV LO[10][D1000] 28.004 PORT RESI?[10][I][D1001];RESI?[10][I] 28.005 MEM/ 1000000 28.006 MEME 28.007 MEMC 1 Mohm 1.5% 0.0000U LowLevel 29.001 MATH MEM1=M[6] 29.002 PORT LEV NO[10][D1000] 29.003 PORT RESI?[10][I][D1001];RESI?[10][I] 29.004 MEM/ 1000000 29.005 MEME 29.006 MEMC 1 Mohm 0.5% 0.0000U NormalLevel 30.001 MATH MEM1=M[6] 30.002 PORT LEV HI[10][D1000] 30.003 PORT RESI?[10][I][D1001];RESI?[10][I] 30.004 MEM/ 1000000 30.005 MEME 30.006 MEMC 1 Mohm 2% 0.0000U HighLevel 31.001 END